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Program

Date
Place
  • Room H (Room Hall 1, 1F)
  • P2. Poster Session II
  • August 21, 2015 (Friday)
  • 14:00 ~ 15:30
  • [P2-58]
  • 14:00 ~ 15:30
  • Title:Novel Approach Self-Positioning of Organic Semiconductor with Large Grain Size on a Bottom Contact Structure TFT during Solution Jetting Process
  • HyoungJin Kim and MunPyo Hong (Korea Univ., Korea)

  • Abstract: ? We investigate the self-positioning ink-jet technique of soluble organic semiconductor with P-29-DPPDTSE by using double layered drying (DLD) method. The DLD process with heterogeneity solvent system for a soluble processible organic semiconductor (s-OSC) on organic gate insulator (GI) is developed. In this study, s-OSC self-positioning technique is examined for obtaining accurate position and well-ordered grain growth during the DLD method ; we used the P-29-DPPDTSE as an OSC and octadecyl trichlorosilane (OTS) as a selective area self assembled monolayer (SAMs) method on GI with DLD. We obtained acurate position and large-sized grain of P-29-DPPDTSE when the OSC solution was jetted on the gate insulator (GI) covered with fluoro-anti-solvent, which separate the OSC ink from gate insulator surface. OTFTs with bottom gate and bottom contact (BG-BC) structure are used to confirm the effect of DLD method. OTFTs¡¯ structure was bottom contact configuration with organosiloxane-based hybrimer. The gold S-D electrodes and SAMs treatment were patterned with conventional photolithography method; width (W) were 500¥ìm and length (L) of OTFTs were 300 and 400¥ìm. OSC was jetted micro pipet. Device exhibited improving characteristics in terms of a threshold voltage of -3.0V (below), a sub-threshold slope of 0.7 V/dec and a field-effect mobility of 3.0 cm2/Vs.

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