Date

Place

Room H (Room Hall 1, 1F)
P2. Poster Session II
August 21, 2015 (Friday)
14:00 ~ 15:30

[P2-31]
14:00 ~ 15:30
Title:Positive Bias Stress Stability in Solution Processed Top-Gate and Top-Contact a-IGZO Thin Film Transistors
Eung-Kyu Park, Ji-Hwan Kim, Hyeong-Jun Cho, Dong-Hoon Lee, and Yong-Sang Kim (Sungkyunkwan Univ., Korea)
Abstract: ?Generally, solution-processed oxide TFTs exhibit poor stability under positive bias stress (PBS). Solution-processed oxide TFTs have two typical defects, which are intrinsic oxygen vacancy and organic chemical induced defects. In this study, the top-gate and top-contact IGZO TFTs were fabricated on glass substrates with spin-coated IGZO film. The Al source/drain electrodes were deposited by thermal evaporation. On top of the source/drain, PMMA (poly(methyl methacrylate)) was spin-coated to a thickness of 180 nm. The PMMA layer has a dual role. It works as a gate insulator, and also acts as a channel passivation layer. The channel passivation layer suppresses the electric-field-induced threshold voltage instability which is caused by the adsorption of oxygen and water molecules from the atmosphere. The gate electrode, a 100 nm thick Al layer, was deposited through the shadow mask by thermal evaporation. The transfer characteristics of IGZO TFTs at the initial and after positive bias stress for various times. The transfer curves shifted towards the positive direction. The phenomenon of the ��VTH shift can be explained using an electron charge trapping mechanism. The ��VTH is caused by the trapping of charges in traps, located at the interface and dielectric layers.
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