Date
Place
- Room H (Room Hall 1, 1F)
- P2. Poster Session II
- August 21, 2015 (Friday)
- 14:00 ~ 15:30
- [P2-14]
- 14:00 ~ 15:30
- Title:Low Hysteresis n-type Printed Organic Thin-Film-Transistor with TiO2/PMMA Bi-Layer Gate Dielectrics
- Nam Hyun Lee and Byung Doo Chin (Dankook Univ., Korea)
Abstract: Polymeric dielectric materials are the promising candidates for a flexible gate insulator with durable, low-cost, and easy processing. However, most of polymeric dielectric materials have relatively low dielectric permittivity than that of inorganic dielectrics. Thus, a variety of studies on a development of composite with high-k dielectric material have been accomplished. In this study, we were fabricated the n-type organic thin-film-transistor(OTFT) with TiO2/PMMA bi-layer gate dielectric with dielectric permittivity up to 20nF/cm2. Also, we investigated the effect of dielectric layer on the performance of OTFT, in order to achieve reduced off-current and hysteresis. In consideration of the channel stability, the device fabricated with top gate bottom contact structure was used. Au source/drain electrodes were thermally deposited on si-wafer substrate and poly{[N,N9-bis(2-octyldodecyl)-naphtha-lene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,59-(2,29-bithiophene)};[(P(NDI2OD-T2))] n-type poly-mer semiconductor was spun coated as a semiconductor layer. Both TiO2-PMMA bi-layer and TiO2-PMMA blended film were compared with PMMA single layer, all were deposted by spin-coating. Au gate electrode was thermally deposited and compared with the inkjet-printed Ag electrodes. Using the TiO2/PMMA bilayer and composite, the capacitance of the dielectric was increased and the hysteresis of the device was significantly reduced. The mobility of the bi-layer device was shown to 0.002 cm2/Vs, which increased by 2.5 times compared to single-layer device(0.0007 cm2/Vs).
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